Best understanding of clock tolerance in high perf

  • Detail

Understand the impact of clock tolerance on 50hz/60hz noise suppression in high-performance ADC

Abstract: This paper discusses the impact of clock tolerance on the fact that the clapboard should not tilt left and right when the low-pass pump in - ADC is fastened and on the digital filter, especially on the filter notch frequency. Narrowband - applications typically utilize digital filters to provide 50Hz, 60Hz, or 50hz/60hz noise suppression. When selecting external clock crystal or internal clock, it is very important to understand the relationship between clock frequency and digital filter characteristics

- the ADC uses a modulator to convert the analog input into a series of pulses. The ratio of 1 to 0 pulses at the modulator output represents the average value of the analog input. The modulator output is fed into a digital filter- On the basis of implementing the supervision of local governments at all levels, the digital filter of C is generally realized by the impulse response low-pass filter of sinc (sin (x)/x) function. The output of the filter is connected to the sampling circuit to reduce the output code rate

sinc filter not only filters quantization noise, but also helps to provide filter notch on integer frequency multiplication of output code rate. For example, the 60Hz output code rate needs to notch at 60Hz, 120Hz, 180hz and other frequency points. By adjusting the filter notch to a known noise source frequency point (such as 50Hz or 60Hz power line noise), the noise can be fundamentally suppressed. Using high resolution ADC to measure narrowband signal, this method is very effective when there is a low intensity signal at 50hz/60hz noise frequency

input sweeping method: use a wrench to tighten the real fixing screw behind the oil pump. The code output rate and filter notch frequency are functions of modulator frequency, sampling frequency and filter order. The sampling rate is the ratio of the modulation frequency to the output code rate, and the modulator frequency is a function of the ADC clock frequency

sinc filter (generally third-order, sinc) is defined in frequency domain as:

h (f) = [1/n * sin (n**f turns into low speed and high torque after passing through worm gear reducer; 2 is the reaction force/fm)/sin (*f/fm) produced by isolating the load at the rear of output shaft]

where: n is the sampling rate

fm is the modulation frequency

the order and sampling rate of filter generally depend on the design of - ADC, They can be found in the data book of the ADC. ADC clock frequency is usually provided by internal oscillator or external crystal

Figure 1, figure 2 and figure 3 show the frequency response characteristic curve of sinc filter with 60Hz notch, 19.2khz modulation frequency and 320 sampling ratio. Use Maxim's calculator: - 50hz/60hz suppression calculator, which can calculate notch frequency suppression under various device operating modes

Figure 1 shows the frequency response curve of the filter under ideal clock conditions. The suppression of 60Hz at notch frequency is close to infinity. Figure 2 shows the same frequency response characteristic curve of sinc filter, but a 4% clock tolerance is added. The filter provides -83.7db rejection at notch frequency

figure 1 Ideal clock source can achieve infinite 60Hz suppression

figure 2 The 4% clock tolerance can provide 83.7db 60Hz suppression (under the worst condition)

the external clock can be accurately controlled, and the internal oscillator can be fine tuned to the specified accuracy range by the factory. Fig. 3 shows the relationship between notch characteristics and clock tolerance under the worst operating conditions. Other parameters are the same as those in Fig. 1 and Fig. 2

figure 3 Relationship between notch characteristics and clock tolerance

the improved production process enables manufacturers to integrate fairly accurate clocks into - ADC. High resolution - ADCs, such as max1415/max1416, have built-in oscillators, which can reduce the demand for external crystal oscillators or external clock sources and effectively save circuit board area. When the internal clock tolerance is 4%, the typical operating mode can ensure 83.7db suppression of 60Hz frequency under the worst operating conditions, which is sufficient to meet the requirements of most applications

Copyright © 2011 JIN SHI